System-on-Chip Solutions for HEP/NP Instrumentation: From Analog Input to Digital Serial Output in One Chip

by Dr Isar Mostafanezhad (Nalu Scientific)

Thursday Nov 9, 2017, 3:30 PM → 4:30 PM Pacific/Honolulu

112 (Watanabe Hall)

In this presentation, we discuss recent progress in Nalu Scientific’s portfolio of full waveform sampling and digitizing Application Specific Integrated Circuits. With recent developments in detector performance and channel density, there is a need for readout electronics that match such capabilities. The new high-density light detectors such as the latest MPC-PMTs or SiPM arrays can produce tens to hundreds of analog channels per centimeter square surface. Traditional methods rely on analog cabling to bring those signals out to readout electronics which introduce issues including noise, power, cost and space. As a solution, we propose full waveform sampling combined with region of interest readout and System-on-Chip calibration and feature extraction to reduce the footprint of the readout electronics and bring them as close to the detector as possible. Such SoCs will be flexible enough to combine most readout functionality into one chip and eliminate the costly FPGAs. There will be less complexity in operating and planning the system, while power consumption is reduced due to removal of analog amplifiers and reduced digital serial lines. Nalu Scientific team is currently working on a portfolio of SoCs at various CMOS technology nodes covering a variety of timing resolutions and channel density. We will present the latest developments, discuss performance and the upcoming release dates of such products. Additionally, we will present various aspects and issues related to starting a technology company in Hawaii from funding to logistics.